From: Varun Wadekar Date: Fri, 26 Jan 2018 18:33:42 +0000 (-0800) Subject: Tegra: fiq_glue: support to handle LEGACY_FIQ PPIs for Tegra SoCs X-Git-Url: http://git.openwrt.org/%22https:/collectd.org//%22/%22https:/collectd.org/%22?a=commitdiff_plain;h=d16b045c5648ace7573ced3c58b61ab1e54244fd;p=project%2Fbcm63xx%2Fatf.git Tegra: fiq_glue: support to handle LEGACY_FIQ PPIs for Tegra SoCs This patch adds support to handle secure PPIs for Tegra watchdog timers. This functionality is currently protected by the ENABLE_WDT_LEGACY_FIQ_HANDLING configuration variable and is only enabled for Tegra210 platforms, for now. Change-Id: I0752ef54a986c58305e1bc8ad9be71d4a8bbd394 Signed-off-by: Varun Wadekar --- diff --git a/plat/nvidia/tegra/common/tegra_fiq_glue.c b/plat/nvidia/tegra/common/tegra_fiq_glue.c index b0366904..60b55955 100644 --- a/plat/nvidia/tegra/common/tegra_fiq_glue.c +++ b/plat/nvidia/tegra/common/tegra_fiq_glue.c @@ -16,9 +16,15 @@ #include #include +#if ENABLE_WDT_LEGACY_FIQ_HANDLING +#include +#endif #include #include +/* Legacy FIQ used by earlier Tegra platforms */ +#define LEGACY_FIQ_PPI_WDT 28U + static DEFINE_BAKERY_LOCK(tegra_fiq_lock); /******************************************************************************* @@ -79,6 +85,20 @@ static uint64_t tegra_fiq_interrupt_handler(uint32_t id, cm_set_elr_el3(NON_SECURE, ns_fiq_handler_addr); } +#if ENABLE_WDT_LEGACY_FIQ_HANDLING + /* + * Tegra platforms that use LEGACY_FIQ as the watchdog timer FIQ + * need to issue an IPI to other CPUs, to allow them to handle + * the "system hung" scenario. This interrupt is passed to the GICD + * via the Flow Controller. So, once we receive this interrupt, + * disable the routing so that we can mark it as "complete" in the + * GIC later. + */ + if (irq == LEGACY_FIQ_PPI_WDT) { + tegra_fc_disable_fiq_to_ccplex_routing(); + } +#endif + /* * Mark this interrupt as complete to avoid a FIQ storm. */ diff --git a/plat/nvidia/tegra/soc/t210/platform_t210.mk b/plat/nvidia/tegra/soc/t210/platform_t210.mk index e23d7e36..59077eb8 100644 --- a/plat/nvidia/tegra/soc/t210/platform_t210.mk +++ b/plat/nvidia/tegra/soc/t210/platform_t210.mk @@ -22,6 +22,9 @@ $(eval $(call add_define,MAX_XLAT_TABLES)) MAX_MMAP_REGIONS := 15 $(eval $(call add_define,MAX_MMAP_REGIONS)) +ENABLE_WDT_LEGACY_FIQ_HANDLING := 1 +$(eval $(call add_define,ENABLE_WDT_LEGACY_FIQ_HANDLING)) + PLAT_INCLUDES += -I${SOC_DIR}/drivers/se BL31_SOURCES += drivers/ti/uart/aarch64/16550_console.S \